Intel Unveils Xeon 6+ as It Pushes AI Deeper into Telecom Networks

At Mobile World Congress in Barcelona, Intel previewed its most densely packed server processor to date, outlining a strategy that places AI directly inside telecom infrastructure rather than alongside it.

The new chip, branded Xeon 6+ and code-named Clearwater Forest, is built around 288 efficiency cores on a single socket. In a dual-socket configuration, the number doubles, which gives users access to hundreds of cores within a standard server footprint. The processor is expected to launch in the first half of 2026.

Intel touts Clearwater Forest as one of its most intricate chip packaging efforts. The design combines a dozen compute tiles produced on Intel’s 18A process with additional base and I/O tiles manufactured on other process nodes. These elements are connected through advanced packaging technologies that stack and bridge silicon to increase density while maintaining bandwidth between components.

Each compute tile integrates clusters of cores, called Darkmont, arranged to maximize parallel throughput. Intel has expanded execution resources within each core and increased cache allocations at multiple levels to sustain high volumes of simultaneous tasks. At the package level, total last-level cache exceeds a gigabyte, a figure intended to support data-intensive workloads without constant trips to main memory.

The platform maintains compatibility with the existing Xeon server socket and supports 12 memory channels. It includes 96 PCIe 5.0 lanes and 64 CXL 2.0 lanes, enabling high-speed connectivity to storage and networking devices. Memory speeds are projected to reach DDR5-8000.

Telecom Market

While the core counts will draw attention from cloud providers seeking to serve dozens or even hundreds of virtual machines from a single system, Intel’s primary emphasis at MWC was telecom infrastructure. The pitch here is that as networks evolve toward 6G, operators are looking to embed AI inference directly within radio access networks (RAN), core environments and edge deployments.

Rather than relying on separate GPU accelerators for every AI workload, Intel’s approach integrates extensions into the CPU itself. The goal is to run real-time inference alongside control plane and user plane functions on the same platform. By doing so, operators can avoid introducing new hardware silos and lessen operating challenges.

Kevork Kechichian, executive VP and general manager of Intel’s Data Center Group, said in a company blog that operators want AI capabilities that can be introduced without redesigning existing networks. In his view, inference should be native to the infrastructure, not bolted on through disruptive architectural shifts.

Collaborations and Ongoing Deployments

As part of its MWC announcements, Intel pointed to collaborations with Ericsson aimed at developing AI-oriented 6G technologies, though specific product details were limited. The broader objective is to blend programmable networking with integrated compute and sensing capabilities, creating a more responsive network fabric.

The company also promoted ongoing deployments of earlier Xeon 6 variants with telecom operators including AT&T, SK Telecom and NTT DOCOMO. These implementations focus on virtualized RAN and mobile core workloads, where energy efficiency and predictable performance are critical.

Clearwater Forest extends that roadmap by increasing core density while targeting improved performance per watt. For telecom vendors managing thousands of distributed cell sites, the ability to consolidate workloads without exceeding power budgets is a central constraint.

Bottom line, Xeon 6+ is primarily about integrating intelligence into infrastructure already in place. In essence, it’s an incremental step toward the next generation of mobile networks.