Researchers at the Massachusetts Institute of Technology (MIT) say they have made a series of breakthroughs that could pave the way for computer chips capable of transmitting more than a petabit of data per second while consuming far less energy.
The work comes from MIT’s Future of Integrated Photonics and Electronics Microsystems (FUTUR-IC) research program, a multi-year initiative launched in 2022 to more tightly integrate electronic and photonic components on semiconductor packages.
The goal is to replace conventional electrical interconnects with optical links that can move vastly larger amounts of data while reducing power consumption.
A key innovation is a new optical interface known as a graded-index coupler, or GRIN, which enables light to be transferred efficiently between photonic devices with bandwidth comparable to that provided by the copper pillars used to connect electrical components.
That plus two other couplers are the optical equivalents of “solder bumps,” or the tiny dots of metal that allow chip-to-chip or chip-to-substrate connections for electron flow. Up until now, there were no analogous “optical bump” options for photonics.
The technology is designed to simplify the integration of electronics, which process information using electricity, with photonics, which transmit data using light.
“Our disruptive electronic-photonic integrated solutions will enable us to leap from hundreds of terabits per second to greater than one petabit per second,” FUTUR-IC director Anu Agarwal said in a statement.
These advances are badly needed in AI because so much data has to be moved around the network, and large datasets require extensive networking. Moving data between processors has become one of the largest constraints on AI performance, and at the same time networking hardware is becoming as significant a consumer of power as compute.
Unlike many experimental photonics technologies, MIT said its microsystems are designed to be manufactured using existing semiconductor foundries and advanced packaging houses, so they could potentially reduce commercialization costs and accelerate industry adoption.
The FUTUR-IC program brings together researchers from MIT and industry partners to develop technologies spanning chip design, advanced packaging, photonic devices and manufacturing processes. The effort is aimed at future communications systems for AI, cloud computing, wireless infrastructure and high-performance computing applications.
The work is designed to find alternatives to traditional copper interconnects, whose bandwidth and power efficiency are becoming limiting factors as AI systems continue to scale. MIT does not have a planned release date for the new technology.
