Qualcomm has signed an AI infrastructure agreement with Amazon that could generate up to $60 billion in business for the chipmaker, giving Qualcomm an important foothold in the rapidly growing data center market.
The two companies will develop multiple generations of custom silicon for Amazon Web Services, with an initial focus on AI inference. They will also work on high-speed optical connectivity for AWS data centers, including networking technology capable of reaching 1.6 terabits per second.
Investors welcomed the deal, with Qualcomm shares rising following the announcement. The partnership gives the company another large cloud customer as it attempts to build a substantial business beyond smartphone processors, and gain market share in the lucrative data center sector. The agreement also places Qualcomm more directly into a market dominated by NVIDIA and contested by Intel, AMD and other chipmakers.
As part of the agreement, Qualcomm issued Amazon warrants to purchase 25 million Qualcomm shares at $161.26 each. Exercising the full warrant would amount to an investment of roughly $4 billion at that price. The warrants vest in stages tied to commercial arrangements, including Amazon purchases of up to $60 billion in Qualcomm server chips and related technology.
“This is the first named customer behind the data center reentry Qualcomm outlined at Investor Day, and it’s targeted at the inference market Futurum identified as the opportunity,” said Brendan Burke, Research Director at The Futurum Group.
“Decode is becoming the volume workload in inference, and it rewards a different chip than the one that won training. NVIDIA has effectively conceded that point by disaggregating Vera Rubin with Groq LPX for decode. Qualcomm’s near-memory High Bandwidth Compute approach attacks the same energy-per-token problem from the custom side and AWS choosing a multi-generational commitment rather than a single design win signals that it wants that architecture on a roadmap it can plan around.”
The open question is execution, Burke added. “The [Qualcomm] Dragonfly CPU is still unproven, and Qualcomm now has to serve as a credible custom partner to AWS while selling merchant AI200 and AI250 systems to everyone else. Custom silicon partners are not supposed to compete with their own customers and Qualcomm will have to show it can manage that tension across multiple generations.”
An Aggressive Target
Qualcomm has set an aggressive target for its expansion in the data center. The company expects its data center business to reach $15 billion in fiscal 2029. In June, it unveiled the Dragonfly C1000, a data center CPU designed for agentic AI workloads, with production expected to begin in 2028. Meta plans to use the processor.
Beyond the Amazon deal, Qualcomm is also targeting growing demand for data center CPUs. While GPUs have dominated headlines for the last few years, CPUs remain essential for general-purpose workloads surrounding AI applications. Bank of America forecasts that the data center CPU market could grow from $27 billion in 2025 to $60 billion by 2030, which equates to a 17% compound annual rate. BOA forecasts that approximately 70% of that total will come from AI servers.
The Amazon partnership also addresses another AI infrastructure challenge: moving enormous volumes of data between computing resources. Qualcomm will contribute its SerDes and optical digital signal processing technology to develop high-bandwidth connections within Amazon data centers. The planned optical technology will support speeds of up to 1.6T, with additional generations expected later.
“The optical piece matters as much as the processor,” Burke said. “Extending Qualcomm’s SerDes and optical DSP to 1.6T links gives AWS a path to build disaggregated inference racks without depending on NVLink for the fabric, which is precisely the ground NVIDIA is trying to hold with NVLink Fusion and its MediaTek and Marvell investments.”
Additionally, Qualcomm plans to expand its use of AWS AI infrastructure for its own chip development, including Amazon Bedrock for electronic design automation workloads. The goal is to shorten chip design cycles.
