South Korean memory maker SK hynix has announced it has delivered HBM4E memory samples to major customers, marking an impending release.

HBM4E is special because it pushes high-bandwidth memory into a much faster, denser, and more efficient tier for AI and HPC systems. It extends the same 2048-bit, 32-channel architecture of HBM4 to higher per-pin speeds, with reported targets around 12.8 to 16 Gb/s and per-stack bandwidth roughly in the 3 to 4 TB/s range.

That’s a doubling over HBM3E specs, currently used in AI accelerators for training large AI models and other data-heavy workloads. HBM3E uses a 1,024-bit interface and typically tops out around 1.2 to 1.3 TB/s per stack. Its per-pin speed is 9.6 Gb/s, well below the 12-16 Gb/s of HBM4E.

At the same time, HBM4E is said to be more power efficient than HBM3E. How much is not clear; one source said HBM4E can be about 1.7x more power efficient at the subsystem level than HBM3E, while SK hynix has reportedly set an HBM4 power-efficiency target of 40%+ improvement over HBM3E.

HBM4E matters because AI processing requires movement of an immense amount of memory between the accelerator chips (mostly GPUs) and memory. Faster HBM means models can feed data to GPUs or accelerators more efficiently, reducing stalls and improving overall performance.

HBM4E reduces data transfer latency through its latest interface and design optimization while maintaining stable operation in high-bandwidth environments. This enables customers to increase efficiency in processing data for AI data centers and large-scale computing systems.

“SK hynix has laid the foundation to strengthen its AI leadership with HBM4E based on its market-leading technological capabilities and manufacturing expertise,” said Ahn Hyun, president and chief development officer in a statement. “Through close collaboration with our partners, we will deliver the value needed in the market while reinforcing our technology leadership as a full-stack AI memory creator.”