Xanadu and AMD have introduced an open-source software platform designed to address the challenge of moving data between quantum processors and classical computing hardware fast enough to support real-time workloads.
Moving data between a traditional CPU and a quantum CPU has been a significant challenge and one not easily met. The problem is that CPUs and quantum processors are so different at the bit level that translation requires multiple steps that can’t be skipped.
The two companies addressed this with an open-source platform called Backline, which connects quantum processors with AMD CPUs, GPUs and FPGAs with microsecond-scale latency. Their published work reports sub-3-microsecond end-to-end quantum-classical loop times in some configurations.
Backline reframes the quantum-classical boundary as a heterogeneous computing problem, treating a quantum processor as one more node in a high-performance distributed network.
The solution seeks to provide researchers and hardware developers low-level hardware control directly through PennyLane’s high-level Python interface. This opens a new design space for hybrid classical/quantum systems, enabling teams to execute ultra-low-latency communication loops between classical and quantum hardware without compromising developer agility or risking vendor lock-in.
Such latency is particularly important for quantum error correction, where classical processors must analyze measurements and feed instructions back to a quantum processor before quantum information is lost.
“Quantum computers never run alone. Every useful quantum system depends on classical compute reacting in microseconds, and that is a heterogeneous computing problem AMD is uniquely built to solve,” said Scott Tease, corporate vice president, HPC and Sovereign AI at AMD, in a statement.
“We co-designed Backline with Xanadu so a single Python program can span AMD EPYC and Threadripper CPUs, AMD Instinct GPUs, AMD Versal FPGAs and AMD Pensando networking, and route every task to the engine that meets its latency budget. That gives the whole quantum ecosystem an open path from research to production, on hardware developers can use today,” Tease said.
AMD’s technical document for Backline highlights the role of different types of classical hardware: CPUs for orchestration, GPUs for parallel processing and decoding, and FPGAs or ASICs for fixed, extremely low-latency control.
Backline is built into Xanadu’s PennyLane platform and ecosystem and uses compilation techniques to translate high-level Python programs into workloads that can run across multiple classical and quantum hardware.
A technical paper published by the developers describes Backline as a heterogeneous compilation and runtime framework built into PennyLane and Catalyst. The researchers demonstrated low-latency data movement across CPUs, GPUs and FPGAs using both local and distributed hardware.
